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| TS507 High precision rail-to-rail operational amplifier Features Pin connections (top view) Ultra low offset voltage: 25 V typ, 100 V max Rail-to-rail input/output voltage swing Operating from 2.7 V to 5.5 V High speed: 1.9 MHz 45 phase margin with 100 pF Low consumption: 0.8 mA at 2.7 V Very large signal voltage gain: 131 dB High power supply rejection ratio: 105 dB Very high ESD protection 5kV (HBM) Latch-up immunity Available in SOT23-5 micropackage SO-8 Non Inverting Input 3 4 Inverting Input Output VDD 1 2 5 VCC SOT23-5 Applications Battery-powered applications Portable devices Signal conditioning Medical instrumentation N.C. Inverting Input Non Inverting Input VDD 1 2 3 4 _ + 8 7 6 5 N.C. VCC Output N.C. Description The TS507 is a high performance rail-to-rail input and output amplifier with very low offset voltage. This amplifier uses a new trimming technique that yields ultra low offset voltages without any need for external zeroing. The circuit offers very stable electrical characteristics over the entire supply voltage range, and is particularly intended for automotive and industrial applications. The TS507 is housed in the space-saving 5-pin SOT23 package, making it well suited for batterypowered systems. This micropackage simplifies the PC board design because of its ability to be placed in tight spaces (external dimensions are 2.8 mm x 2.9 mm). April 2008 Rev 5 1/20 www.st.com 20 Contents TS507 Contents 1 2 3 Absolute maximum ratings and operating conditions . . . . . . . . . . . . . 3 Electrical characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4 Application note . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15 3.1 3.2 Out-of-the-loop compensation technique . . . . . . . . . . . . . . . . . . . . . . . . . 15 In-the-loop-compensation technique . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16 4 Package information . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 17 4.1 4.2 SOT23-5 package information . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 17 SO-8 package . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 18 5 6 Ordering information . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 19 Revision history . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 19 2/20 TS507 Absolute maximum ratings and operating conditions 1 Absolute maximum ratings and operating conditions Table 1. Symbol VCC Vid Vin Tstg Rthja Supply voltage (1) Differential input voltage Input voltage (3) (2) Absolute maximum ratings (AMR) Parameter Value 6 2.5 VDD-0.3 to VCC+0.3 -65 to +150 (4) (5) Unit V V V C C/W Storage temperature Thermal resistance junction to ambient SOT23-5 SO-8 Thermal resistance junction to case SOT23-5 SO-8 Maximum junction temperature HBM: human body model(6) 250 125 81 40 150 5 300 Rthjc Tj C/W C kV V kV ESD MM: machine model (7) (8) CDM: charged device model Latch-up immunity 1. Value with respect to VDD pin. 2 class A 2. Differential voltages are the non-inverting input terminal with respect to the inverting input terminal. 3. VCC-Vin must not exceed 6V and Vin must not exceed 6V. 4. Short-circuits can cause excessive heating and destructive dissipation. 5. Rthja/c are typical values. 6. Human body model: A 100 pF capacitor is charged to the specified voltage, then discharged through a 1.5 k resistor between two pins of the device. This is done for all couples of connected pin combinations while the other pins are floating. 7. Machine model: A 200 pF capacitor is charged to the specified voltage, then discharged directly between two pins of the device with no external series resistor (internal resistor < 5 ). This is done for all couples of connected pin combinations while the other pins are floating. 8. Charged device model: all pins and the package are charged together to the specified voltage and then discharged directly to the ground through only one pin. This is done for all pins. Table 2. Symbol VCC Vicm Vid Toper Operating conditions Parameter Supply voltage(1) Common mode input voltage range Differential input voltage(2) Value 2.7 to 5.5 VDD to VCC 2.5 0 to +85 -40 to +125 Unit V V V C Operating free air temperature range TS507C TS507I 1. Value with respect to VDD pin. 2. Differential voltages are the non-inverting input terminal with respect to the inverting input terminal. 3/20 Electrical characteristics TS507 2 Table 3. Symbol Electrical characteristics Electrical characteristics at VCC = +5V, VDD = 0V, Vicm = VCC/2, Tamb = 25C, RL connected to VCC/2 (unless otherwise specified)(1) Parameter Conditions Min. Typ. Max. Unit DC performance Vicm = 0 to 3.8V, T=25C TS507C full temp range TS507I full temp range Vicm = 0V to 5V, T=25C TS507C full temp range TS507I full temp range Vio drift vs. temperature Input bias current Tmin < Top < Tmax T = 25C TS507C full temp range TS507I full temp range T = 25C TS507C full temp range TS507I full temp range Vicm from 0V to 3.8V, T=25C TS507C full temp range TS507I full temp range Vicm from 0V to 5V Power supply rejection ratio 20 log (VCC/Vio) VCC from 2.7V to 5.5V, Vicm=vcc/2, T=25C TS507C full temp range TS507I full temp range RL = 10k Vout= 0.5V to 4.5V , Full temp range RL = 600, T=25C TS507C full temp range TS507I full temp range RL = 10k, T=25C Full Temp range RL = 600, T=25C TS507C full temp range TS507I full temp range RL = 10k, T=25C Full temp range 91 90 89 99 98 94 94 91 1 8 70 75 110 25 35 50 25 100 250 400 450 550 750 V Vio Input offset voltage(2) V V/C nA Vio/t Iib 2 Iio Input offset current nA 115 dB 96 105 CMRR Common mode rejection ratio 20 log (Vicm/Vio) PSRR dB Avd Large signal voltage gain 131 67 95 110 120 15 15 90 110 125 15 15 dB VCC-VOH High level output voltage drop mV 4 64 VOL Low level output voltage mV 4 4/20 TS507 Table 3. Symbol Electrical characteristics Electrical characteristics at VCC = +5V, VDD = 0V, Vicm = VCC/2, Tamb = 25C, RL connected to VCC/2 (unless otherwise specified)(1) (continued) Parameter Conditions Vout = VCC, Vid=-1V, T=25C TS507C full temp range TS507I full temp range Vout = VDD, Vid=1V, T=25C TS507C full temp range TS507I full temp range No load, Vout=VCC/2, Vicm=0 to 5V, T=25C Full temp range Min. 74 60 53 90 77 70 Typ. 104 Max. Unit Isink Iout Isource mA 128 ICC Supply current (per operator)(2) 0.85 1.15 1.25 mA Dynamic performance GBP m Gm SR eN iN Gain bandwidth product Phase margin Gain margin Slew rate Equivalent input noise voltage Equivalent input noise current RL = 2k, CL = 100pF, f = 100kHz RL = 2k CL=100pF , RL = 2k CL=100pF , RL = 2k, CL=100pF, Vout = 1.25V to 3.75V, 10% to 90% f = 1kHz f = 10kHz f=1kHz, G=1, RL=2k Vicm=2V, , Vout=3.5Vpp 1.9 45 10 0.6 12 1.2 0.0003 MHz Degrees dB V/s nV/Hz pA/Hz % THD+eN THD + noise 1. All parameter limits at temperatures different from 25 C are guaranteed by correlation. 2. Measurements done at 4 Vicm values: Vicm=0 V, Vicm=3.8 V, Vicm=4.2 V, Vicm=5 V. 5/20 Electrical characteristics TS507 Table 4. Symbol Electrical characteristics at VCC = +3.3V, VDD = 0V, Vicm = VCC/2, Tamb = 25C, RL connected to VCC/2 (unless otherwise specified)(1) Parameter Conditions Min. Typ. Max. Unit DC performance Vicm = 0 to 2.1V, T=25C TS507C full temp range TS507I full temp range Vicm = 0V to 3.3V, T=25C TS507C full temp range TS507I full temp range Vio drift vs. temperature Tmin < Top < Tmax T = 25C TS507C full temp range TS507I full temp range T = 25C TS507C full temp range TS507I full temp range Vicm from 0V to 2.1V RL = 10k Vout= 0.5V to 2.8V , RL = 600, T=25C TS507C full temp range TS507I full temp range RL = 10k, T=25C Full temp range RL = 600, T=25C TS507C full temp range TS507I full temp range RL = 10k, T=25C Full temp range Isink Iout Isource Vout = VCC, Vid=-1V, T=25C TS507C full temp range TS507I full temp range Vout = VDD, Vid=1V, T=25C TS507C full temp range TS507I full temp range No load, Vout=VCC/2, Vicm=0 to 3.3V, T=25C Full temp range 33 26 22 37 32 29 1 6 70 75 145 25 40 45 25 100 250 400 450 550 750 V Vio Input offset voltage(2) V Vio V/C Iib Input bias current nA 2 Iio Input offset current Common mode rejection ratio 20 log (Vicm/Vio) Large signal voltage gain nA CMRR Avd 115 127 59 85 100 110 15 15 80 100 115 15 15 dB dB VCC-VOH High level output voltage drop mV 4 57 VOL Low level output voltage mV 4 48 mA 56 ICC Supply current (per operator)(2) 0.81 1.1 1.2 mA 6/20 TS507 Table 4. Symbol Electrical characteristics Electrical characteristics at VCC = +3.3V, VDD = 0V, Vicm = VCC/2, Tamb = 25C, RL connected to VCC/2 (unless otherwise specified)(1) (continued) Parameter Conditions Min. Typ. Max. Unit Dynamic performance GBP m Gm SR eN Gain bandwidth product Phase margin Gain margin Slew rate Equivalent input noise voltage RL = 2k, CL = 100pF, f = 100kHz RL = 2k CL=100pF , RL = 2k CL=100pF , RL = 2k, CL=100pF, Vout= 0.5V to 2.8V, 10% to 90% f = 1kHz 1.9 45 10 0.6 12 0.0004 MHz Degrees dB V/s nV/Hz % THD+eN THD + noise , f=1KHz, G=1, RL=2k Vicm=1.15V, Vout=1.8Vpp 1. All parameter limits at temperatures different from 25 C are guaranteed by correlation. 2. Measurements done at 4 Vicm values: Vicm=0 V, Vicm=2.1 V, Vicm=2.5 V, Vicm=3.3 V. 7/20 Electrical characteristics TS507 Table 5. Symbol Electrical characteristics at VCC = +2.7V VDD = 0V, Vicm = VCC/2, Tamb = 25C, RL connected to VCC/2 (unless otherwise specified)(1) Parameter Conditions Min. Typ. Max. Unit DC performance Vicm = 0 to 1.9V, T=25C TS507C full temp range TS507I full temp range Vicm = 0V to 2.7V, T=25C TS507C full temp range TS507I full temp range Vio drift vs. temperature Tmin < Top < Tmax T = 25C TS507C full temp range TS507I full temp range T = 25C TS507C full temp range TS507I full temp range Vicm from 0V to 1.5V RL = 10k Vout= 0.5V to 2.2V , RL = 600, T=25C TS507C full temp range TS507I full temp range RL = 10k, T=25C Full temp range RL = 600, T=25C TS507C full temp range TS507I full temp range RL = 10k, T=25C Full temp range Isink Iout Isource Vout = VCC, Vid=-1V, T=25C TS507C full temp range TS507I full temp range Vout = VDD, Vid=1V, T=25C TS507C full temp range TS507I full temp range No load, Vout=VCC/2, Vicm=0 to 2.7V, T=25C Full temp range 20 15 13 22 19 17 1 8 70 75 160 25 45 45 25 100 250 400 450 550 750 V Vio Input offset voltage(2) V Vio V/C Iib Input bias current nA 2 Iio Input offset current Common mode rejection ratio 20 log (Vicm/Vio) Large signal voltage gain nA CMRR Avd 115 126 57 85 100 105 15 15 80 100 115 15 15 dB dB VCC-VOH High level output voltage drop mV 4 57 VOL Low level output voltage mV 4 30 mA 35 ICC Supply current (per operator)(2) 0.79 1.1 1.2 mA 8/20 TS507 Table 5. Symbol Electrical characteristics Electrical characteristics at VCC = +2.7V VDD = 0V, Vicm = VCC/2, Tamb = 25C, RL connected to VCC/2 (unless otherwise specified)(1) (continued) Parameter Conditions Min. Typ. Max. Unit Dynamic performance GBP m Gm SR eN Gain bandwidth product Phase margin Gain margin Slew rate Equivalent input noise voltage RL = 2k, CL = 100pF, f = 100kHz RL = 2k CL=100pF , RL = 2k CL=100pF , RL = 2k, CL=100pF, Vout= 0.5V to 2.2V, 10% to 90% f = 1kHz 1.9 45 11 0.6 12 0.0005 MHz Degrees dB V/s nV/Hz % THD+eN THD + noise , f=1KHz, G=1, RL=2k Vicm=0.85V, Vout=1.2Vpp 1. All parameter limits at temperatures different from 25 C are guaranteed by correlation. 2. Measurements done at 4 Vicm values: Vicm=0 V, Vicm=1.5 V, Vicm=1.9 V, Vicm=2.7 V. 9/20 Electrical characteristics TS507 Figure 1. Input offset voltage distribution for Figure 2. Vicm VCC-1.2V at T=25C 400 350 300 250 200 150 100 50 0 -50 -100 -150 -200 -250 Input offset voltage distribution vs. temperature for Vicm VCC-1.2V 30 25 Vio distribution at T=25C for 0V<=Vicm<=Vcc-1.2V 0V<=Vicm<=Vcc-1.2V 20 Population % 15 10 5 Vio (V) -300 -350 -400 -100 -80 -60 -40 -20 0 20 40 60 80 100 120 0 -120 -50 -40 -30 -20 -10 0 10 20 30 40 50 60 70 80 90 100 110 120 130 Input offset voltage (V) Temperature (C) Figure 3. Input offset voltage distribution vs. Figure 4. temperature for Vicm VCC-0.8V 45 40 35 30 Input offset voltage distribution for Vicm VCC-1.2V at T=25C after HTB Vio distribution at T=25C for 0V<=Vicm<=Vcc-1.2V after HTB (1000 hours at 125C) 700 600 500 400 300 200 100 0 -100 -200 -300 -400 -500 -600 -700 -50 -40 -30 -20 -10 0 10 20 30 40 50 60 70 80 90 100 110 120 130 Vcc-0.8V<=Vicm<=Vcc Population % Vio (V) 25 20 15 10 5 0 -100 -80 -60 -40 -20 0 20 40 60 80 100 Temperature (C) Input offset voltage (V) Figure 5. Input offset voltage distribution for Figure 6. Vicm VCC-1.2V at T=25C after THB 40 Input offset voltage vs. input common mode voltage at T=25C 35 Vcc=3.3V Input Offset Voltage (V) Vcc=2.7V 30 Vio distribution at T=25C for 0V<=Vicm<=Vcc-1.2V after THB (1000 hours at 85C, humidity 85%) 20 0 -20 -40 -60 -80 -100 -2.5 -2.0 -1.5 -1.0 Vicm-Vcc (V) -0.5 0.0 Vcc=5.5V Vcc=5V 25 Population % 20 15 10 5 0 -120 -100 -80 -60 -40 -20 0 20 40 60 80 100 120 Input offset voltage (V) 10/20 TS507 Electrical characteristics Figure 7. Supply current vs. input common mode voltage in closed loop configuration at VCC=5V Figure 8. Supply current vs. supply voltage at Vicm=VCC/2 1.0 0.8 Supply Current (mA) Supply Current (mA) 1.0 T=125C 0.8 0.7 T=25C T=-40C 0.5 0.3 Vcc=5V Closed loop 0.2 T=125C 0.7 T=25C 0.5 0.3 T=-40C 0.2 Vicm=Vcc/2 0.0 0 1 2 3 4 Input common mode voltage (V) 5 0.0 0 1 2 3 Supply voltage (V) 4 5 Figure 9. Supply current vs. input common mode voltage in follower configuration at VCC=2.7V T=125C Figure 10. Supply current vs. input common mode voltage in follower configuration at VCC=5V 1.0 0.8 Supply Current (mA) 1.0 0.8 Supply Current (mA) 0.7 T=25C 0.7 T=125C T=-40C T=25C 0.5 0.3 T=-40C 0.5 0.3 Follower configuration Vcc=2.7V 0.2 0.2 Follower configuration Vcc=5V 0.0 0.0 0.0 0.5 1.0 1.5 2.0 Input Common Mode Voltage (V) 2.5 0 1 2 3 4 Input Common Mode Voltage (V) 5 Figure 11. Output current vs. supply voltage at Figure 12. Output current vs. output voltage at Vicm=VCC/2 VCC=2.7V 150 125 100 75 Output Current (mA) Source Vid = 1V T=125C T=25C T=-40C 50 25 0 -25 -50 -75 -100 -125 -150 3.0 3.5 4.0 4.5 Supply voltage (V) 5.0 5.5 T=125C Sink Vid = -1V T=25C T=-40C Vicm=Vcc/2 40 T=-40C 35 30 Source 25 Vid=1V 20 T=25C 15 T=125C 10 5 0 Vcc=2.7V -5 -10 T=125C -15 T=25C -20 Sink -25 -30 Vid=-1V -35 T=-40C -40 0.0 0.5 1.0 1.5 2.0 2.5 Output Voltage (V) Output Current (mA) 11/20 Electrical characteristics TS507 Figure 13. Output current vs. output voltage at Figure 14. Positive and negative slew rate vs. VCC=5V supply voltage T=25C Source Vid=1V T=-40C T=125C Vcc=5V T=125C Positive and Negative Slew Rate (V/s) 150 125 100 75 Output Current (mA) 1.0 0.8 0.6 0.4 0.2 0.0 -0.2 -0.4 -0.6 -0.8 -1.0 2.0 2.5 3.0 Negative slew rate 3.5 4.0 4.5 Supply Voltage (V) 5.0 T=125C 5.5 6.0 T=-40C Vin : from 0.5V to Vcc-0.5V SR : calculated from 10% to 90% T=25C Positive slew rate T=125C 50 25 0 -25 -50 -75 -100 -125 -150 0.0 T=-40C T=25C Sink Vid=-1V T=-40C 1.0 T=25C 4.0 5.0 2.0 3.0 Output Voltage (V) Figure 15. Voltage gain and phase vs. Figure 16. Voltage gain and phase vs. frequency at VCC=5V and Vicm=2.5V frequency at VCC=5V and Vicm=2.5V at T=25C at T=-40C 50 40 30 20 Gain (dB) 180 Phase 150 120 90 Cl=100pF Gain 60 Gain (dB) Phase () 50 40 30 20 10 0 -10 -20 -30 -40 -50 4 10 Vcc=5V, Vicm=2.5V, G= -100 Rl=2kOhms, Cl=100pF, Vrl=Vcc/2 Tamb=-40C 10 5 180 150 120 90 60 Phase Gain Phase () 10 0 -10 -20 -30 -40 -50 4 10 Cl=230pF 30 0 -30 -60 -90 -120 -150 -180 30 0 -30 -60 -90 -120 -150 10 7 Vcc=5V, Vicm=2.5V, G= -100 Rl=2kOhms, Vrl=Vcc/2 Tamb=25C 10 5 10 6 10 7 10 6 -180 Frequency (Hz) Frequency (Hz) Figure 17. Voltage gain and phase vs. Figure 18. Closed loop gain in voltage follower frequency at VCC=5V and Vicm=2.5V configuration for different at T=125C capacitive load at T=25C 50 40 30 20 Gain (dB) 180 150 120 90 60 Phase Gain Vcc=5V, Vicm=2.5V, G= -100 Rl=2kOhms, Cl=100pF, Vrl=Vcc/2 Tamb=125C 5 6 7 20 TS507 : V cc = 5 V V icm = 2,5 V T = 25 C R L = 10 k 10 0 Gain (dB) Phase () 10 0 -10 -20 -30 -40 -50 4 10 30 0 -30 -60 -90 -120 -150 -180 10 -10 -20 -30 G ain without C L G ain with C L =300 pF G ain with C L =550 pF 10 10 -40 10k 100k 1M 10M Frequency (Hz) Frequency (H z) 12/20 TS507 Electrical characteristics Figure 19. Gain margin according the output load, at VCC=5V and T=25C 1E-6 1E-7 Load Capacitor (F) UNSTABLE Figure 20. Phase margin according the output load, at VCC=5V and T=25C 1E-6 V cc = 5 V V icm = 2,5 V T amb = 25 C V cc = 5 V V icm = 2,5 V T amb = 25 C Load Capacitor (F) 1E-7 0 1E-8 10 1E-9 20 30 UNSTABLE 1E-8 1E-9 0 dB 1E-10 1E-11 30 dB STABLE 10 dB 20 dB 1E-10 1E-11 1E-12 40 50 STABLE 1E-12 1 10 100 1k 10k 100k 1M 10M Load Resistor ( ) 1 10 100 1k 10k 100k 1M 10M Load Resistor () Figure 21. Gain margin vs. output current, at VCC=5V and T=25C 20.0 17.5 15.0 Gain Margin (dB) Figure 22. Phase margin vs. output current, at VCC=5V and T=25C 70 R ecom m ended area 100 pF 60 50 Phase Margin () R ecom m e nded a rea 12.5 10.0 7.5 5.0 2.5 0.0 -2.5 -4 -3 -2 -1 0 1 2 3 4 O utput Current (m A) 40 30 20 10 0 -1 0 -4 -3 -2 5 50 pF 10 0 pF 30 0 pF 300 pF 550 pF V cc = 5 V V icm = 2,5 V T am b = 25 C R L = 2 k V cc = 5 V V icm = 2,5 V T am b = 2 5 C R L = 2 k -1 0 1 2 3 4 O utput C urrent (m A) Figure 23. Phase and gain margins vs capacitive load at = 25C 30 20 10 Gain (dB) Figure 24. Distortion + noise vs. output voltage 75 0.1000 Vcc=5V Vcc = 5 V Vicm = 2,5 V 50 Tamb = 25 C RL = 2 k 25 Phase () 0 -10 Gain Margin -20 Phase Margin -30 -40 10p 0 -25 -50 -75 -100 10n THD + N (%) 0.0100 Vcc=3.3V Vcc=2.7V f=1kHz Rl=2kO hm s G ain=1 BW =22kHz Vicm =(Vcc-1V)/2 0.0010 100p 1n 0.0001 0.01 0.1 1 Output Voltage (Vpp) Load Capacitor (F) 13/20 Electrical characteristics Figure 25. Distortion + noise vs. frequency 0.01 Vout=Vcc-1.5Vpp Rl=2kO hm s G ain=1 BW =80kHz Vicm =(Vcc-1V)/2 1E-3 Vcc=3.3V Vcc=5V Input equivalent noise density (nV/VHz) TS507 Figure 26. Noise vs. frequency 1000 THD + N (%) Vcc=2.7V 100 10 Vcc=5V, Vicm=2.5V, Tamb=25C 1E-4 10 1 100 1000 Frequency (Hz) 10000 1 10 100 Frequency (Hz) 1000 10000 14/20 TS507 Application note 3 Application note An application note, based on the TS507, describes three compensation techniques for solving stability issues when driving large capacitive loads. Two of them are briefly explained here. For more details, refer to the application note on www.st.com. To find it, do a keyword search for AN2653. 3.1 Out-of-the-loop compensation technique The first technique, named the out-of-the-loop compensation, uses an isolation resistor, ROL, added in series between the output of the amplifier and its load (see Figure 27). The resistor isolates the op-amp feedback network from the capacitive load. This compensation method is effective, but the drawback is a limitation on the accuracy of Vout depending on the resistive load value. Figure 27. Out-of-the-loop compensation schematics To help implement the compensation, the abacus given in Figure 28 to Figure 29 provide the ROL value to choose for a given CL and phase/gain margins. These abacus are plotted in the case of a voltage follower configuration with a load resistor of 10 k at 25C. Figure 28. Gain margin abacus : serial resistor Figure 29. Phase margin abacus : serial to be added in a voltage follower resistor to be added in a voltage configuration at 25C follower configuration at 25C 100 Compensation Resistor ROL 100 STAB LE Compensation Resistor ROL STABLE 8 dB 30 10 20 10 1 U N STAB LE 10 12 dB 1 16 dB 4 dB 0 0 dB U NSTAB LE 0 .1 V cc = 5 V V ic m = 2 ,5 V T = 2 5 C RL = 10 k 1 10 0 .1 V cc = 5 V V icm = 2 ,5 V T = 2 5 C R L = 10 k 100p 1n 10n 100n 1 10 0 .0 1 10p 100p 1n 10n 100n 0 .0 1 10p L o ad C ap a cito r (F ) L o ad C a p a cito r (F ) 15/20 Application note TS507 3.2 In-the-loop-compensation technique The second technique is called the in-the-loop-compensation technique, because the additional components (a resistor and a capacitor) used to improve the stability are inserted in the feedback loop (see Figure 30). Figure 30. In-the-loop compensation schematics This compensation method allows, by a good choice of compensation components, to compensate the original pole (caused by the capacitive load), and thus to improve stability. The main drawback of this circuit is the reduction of the output swing, because the isolation resistor is in the signal path. Table 6 helps you to choose the best compensation components for different ranges of load capacitors (and with RL = 10 k) in voltage follower configuration. Table 6. Best compensation components for different load capacitor ranges in voltage follower configuration for TS507 (with RL = 10 k) RIL (k) 1 1 1 CIL (pF) 250 250 630 Minimum gain margin (dB)(1) 17 16 11 Minimum phase margin (degree)(1) 55 42 27 Load capacitor range 10 pF to 100 pF 100 pF to 1 nF 1 nF to 10 nF 1. Parameter guaranteed by design at 25C. 16/20 TS507 Package information 4 Package information In order to meet environmental requirements, STMicroelectronics offers these devices in ECOPACK(R) packages. These packages have a lead-free second level interconnect. The category of second level interconnect is marked on the package and on the inner box label, in compliance with JEDEC Standard JESD97. The maximum ratings related to soldering conditions are also marked on the inner box label. ECOPACK is an STMicroelectronics trademark. ECOPACK specifications are available at: www.st.com. 4.1 SOT23-5 package information Figure 31. SOT23-5 package mechanical drawing Table 7. SOT23-5 package mechanical data Dimensions Ref. Min. A A1 A2 b C D E E1 e e1 L 0.35 0.90 0.00 0.90 0.35 0.09 2.80 2.60 1.50 Millimeters Typ. Max. 1.45 0.15 1.30 0.50 0.20 3.00 3.00 1.75 0.95 1.9 0.55 13.7 Min. 35.4 0.00 35.4 13.7 3.5 110.2 102.3 59.0 Mils Typ. Max. 57.1 5.9 51.2 19.7 7.8 118.1 118.1 68.8 37.4 74.8 21.6 17/20 Package information TS507 4.2 SO-8 package Figure 32. SO-8 package mechanical drawing Table 8. SO-8 package mechanical data Dimensions Ref. Min. A A1 A2 b c D E E1 e h L k ccc 0.25 0.40 1 0.10 1.25 0.28 0.17 4.80 5.80 3.80 Millimeters Typ. Max. 1.75 0.25 0.004 0.049 0.48 0.23 4.90 6.00 3.90 1.27 0.50 1.27 8 0.10 0.010 0.016 1 5.00 6.20 4.00 0.011 0.007 0.189 0.228 0.150 Min. Inches Typ. Max. 0.069 0.010 0.019 0.010 0.193 0.236 0.154 0.050 0.020 0.050 8 0.004 0.197 0.244 0.157 18/20 TS507 Ordering information 5 Ordering information Table 9. Order codes Temperature range Package Packing Marking Order code TS507ID TS507IDT TS507IYD(1) TS507IYDT(1) TS507ILT TS507IYLT(1) TS507CD TS507CDT TS507CLT SO-8 -40C to 125C SO-8 (Automotive grade) SOT23-5(2) -40C to 125C SOT23-5(2) (Automotive grade) SO-8 0C to 85C SOT23-5(2) Tube or Tape & reel TS507I TS507Y Tape & reel Tape & reel Tube or Tape & reel Tape & reel K131 K137 TS507C K136 1. Qualification and characterization according to AEC Q100 and Q003 or equivalent, advanced screening according to AEC Q001 & Q 002 or equivalent are on-going. 2. All information related to the SOT23-5 package is subject to change without notice. 6 Revision history Table 10. Date 01-Oct-2004 02-May-2006 15-Dec-2006 03-May-2007 08-Apr-2008 Document revision history Revision 1 2 3 4 5 Changes Preliminary data release for product in development. Update preliminary data release for product in development. First public release. Automotive grade products added. Electrical characteristics curves for Bode and AC stability added and updated. Application note section added. 19/20 TS507 Please Read Carefully: Information in this document is provided solely in connection with ST products. STMicroelectronics NV and its subsidiaries ("ST") reserve the right to make changes, corrections, modifications or improvements, to this document, and the products and services described herein at any time, without notice. All ST products are sold pursuant to ST's terms and conditions of sale. Purchasers are solely responsible for the choice, selection and use of the ST products and services described herein, and ST assumes no liability whatsoever relating to the choice, selection or use of the ST products and services described herein. No license, express or implied, by estoppel or otherwise, to any intellectual property rights is granted under this document. If any part of this document refers to any third party products or services it shall not be deemed a license grant by ST for the use of such third party products or services, or any intellectual property contained therein or considered as a warranty covering the use in any manner whatsoever of such third party products or services or any intellectual property contained therein. UNLESS OTHERWISE SET FORTH IN ST'S TERMS AND CONDITIONS OF SALE ST DISCLAIMS ANY EXPRESS OR IMPLIED WARRANTY WITH RESPECT TO THE USE AND/OR SALE OF ST PRODUCTS INCLUDING WITHOUT LIMITATION IMPLIED WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE (AND THEIR EQUIVALENTS UNDER THE LAWS OF ANY JURISDICTION), OR INFRINGEMENT OF ANY PATENT, COPYRIGHT OR OTHER INTELLECTUAL PROPERTY RIGHT. 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